SiC MOSFETs have been commercialized over the years in pursuit of lower on-resistance and higher switching performance but there are still some gate oxide related challenges related to material properties. Dynamic Gate Switching (DGS) instability is a phenomenon when a SiC MOSFET is switched in a bipolar mode (from a positive to a negative Vgs) and this leads to permanent shift of the threshold voltage (ΔVth). This effect occurs during application conditions but can be observed also by using just a gate driver for the switching with the SiC MOSFET drain and gate shorted. Previous investigations into the DGS instability have mostly been limited to room temperature conditions. This Thesis work will involve understanding of this phenomenon as a function of temperature which might lead to creation of a test setup to enable these measurements. Characterization will be done both for packaged devices as well as on wafer level, and the Vth drift behaviour will be modeled.
- Perform electrical characterization of experimentally fabricated SiC MOSFETs.
- Carry out reliability investigation measurements both directly on wafers and on packaged devices.
- Use a semi-automatic wafer-probing system equipped with a Keithley parameter analyzer.
- Use Python and microcontroller programming for automation and data extraction.
- Conduct SEM-cross sections in the Electrum clean room to investigate samples and support the process integration team (not directly connected to the dynamic gate stress analysis).
- Investigate influence of experimental parameters on the dynamic gate stress
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