You will be part of a small team responsible for:

-Leading efforts to bring up, validate, and characterize high-speed SerDes blocks.
-Possessing hands-on experience with various high-speed SerDes architectures, including NRZ and PAM, as well as associated protocols.
-Demonstrating in-depth knowledge of crucial SerDes blocks such as CTLE, DFE, FFE, CDR, and PLLs, along with their characterization and debugging processes.
-Being proficient in using test and measurement equipment like high-speed oscilloscopes and BERTs.
-Understanding SerDes adaptation techniques.
-Experience analyzing SerDes signal integrity.
-Experience with high-speed protocols such as USB, PCIe, DP, etc.
-Exhibiting strong debugging and problem-solving skills, with data investigation and mining expertise.
-Developing robust test methodologies to evaluate performance and calculate high-speed serial interfaces (SerDes) operating margins across PVT variations.
-Supporting ATE and Product Engineering

Minimum Qualifications
BSEE and 7+ years related industry experience

Preferred Qualifications
MSEE and 7+ years related industry experience
Hands on SerDes Lab experience
Python programming experience