CPU Physical Design Methodology and Optimization Engineer

Santa Clara Posted 4/14/2026 Leaves the board in 4 days

Open in 2 locations. Pick one to apply to.

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• Work with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA
• Detailed analysis across partitions to understand optimization opportunity
• Develop new PD focused flows to improve CPU performance and efficiency
• Cross-functional collaboration across STA, library, tech and post silicon team to improve optimization during physical design

Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Experience in digital circuits, timing/power concepts, and logic design
Experience with TCL or Perl

Preferred Qualifications
Strong fundamentals in high-performance & low-power physical design techniques
Experience in using industry-standard synthesis, PnR, and STA tools
Proficiency in programming and scripting in Python, TCL, or Perl
Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract Power Performance & Area during physical design
Ability to work independently and/or lead physical design methodology and optimization techniques across partitions in collaboration with x-functional teams
Excellent communication and interpersonal skills