Graphics Emulation Test Bench and Infrastructure Architect

As a Graphics Emulation Test Bench and Infrastructure Engineer in Apple's GPU Design Verification and Validation organization, you'll ensure our complex GPU designs and software meet Apple's quality standards through comprehensive hardware/software platform testing. Working with the complete software stack, you'll validate designs that enable seamless execution of demanding graphics workloads. You’ll be responsible for supporting functional verification, power and performance analysis, implementation, and Silicon validation by building emulation models, running both synthetic and real-world test cases on those emulation models, debugging and resolving issues, reporting status, and driving emulation and acceleration solutions from concept to Silicon. Your strong test bench knowledge and a solid foundation in verification methodology will be leveraged to create high-quality reusable test bench components and environments used to run complex tests.

Minimum Qualifications
BS + 10 years of relevant experience
Experience with complex bus protocols such as PCIe and AXI
Experience in profiling and optimizing test bench components
Experience with CPU and/or GPU architecture and micro architecture
Experience with DPI/transactors
Experience in writing behavioral and synthesizable RTL (SystemVerilog/Verilog)
Experience with programming in one or more of the following languages: C/C++, Perl, Ruby, Python

Preferred Qualifications
Demonstrated technical leadership in the area of test benches, emulation, and/or simulation
Excellent planning, collaboration, and communication abilities
Demonstrated ability to build emulation models, run tests on emulation machines, and debug issues in a schedule-oriented silicon design project with competing priorities
Ability to debug hardware issues from waveforms
Ability to interface emulation hardware with virtual systems, simulation environment, and silicon validation
Experience with DPI/transactors
Graphics knowledge; 3D graphics pipeline, OGL/OCL programming
Ability to collaborate under tight schedules
Excellent planning, collaboration, and communication abilities
Demonstrated ability to build simulation models, run tests, and debug issues in a schedule-oriented silicon design project with competing priorities
Excellent planning, collaboration, and communication abilities
Ability to collaborate under tight schedules