SoC Machine Learning Design Engineer

Cupertino Posted 6/24/2026 Leaves the board in 3 days

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- As a member of the SoC design machine learning team, you will be part of a dynamic team that is building the most efficient application processors on the planet, powering the next generation of Apple products.
- Your expertise in machine learning will be instrumental in optimizing for efficiency, quality and speed for our chip-design process.
- You’ll play a crucial role in developing generative AI and machine learning solutions for optimizations in RTL Design, Verification, and Power/Performance/Area efforts.
- You will collaborate closely with our internal multi-functional teams as well as the AIML organization at Apple to understand domain-specific needs and tailor machine learning solutions to these domains.
- As part of this role, you will keep abreast of emerging technologies in machine learning and chip design to ensure our solutions remain state-of-the-art.
- Prior leadership experience a plus.

Minimum Qualifications
Minimum of BS + 10 years relevant industry experience.

Preferred Qualifications
Practical experience and knowledge of generative AI and modern machine learning methods.
Experience with any of the following: RAG systems including embedding models, retrieval strategies, and context optimization techniques. Generative AI pipeline development. AI evaluation and testing proficiency including designing test suites and implementing human evaluation frameworks. Experience with AI coding assistants. Experience with AI infrastructure protocols such as MCP.
Experience with Deep neural networks and reinforcement learning is a plus
Solid math background and understanding of algorithms and data structures
Experience with current deep learning frameworks, such as PyTorch, TensorFlow, JAX or MLX
Experience with hardware description languages like Verilog, SystemVerilog or VHDL.
Experience with Chip design and verification front end flows is a plus: Working verification experience with UVM testbenches. Working experience with front-end tools such as Static timing analysis and CDC/RDC.
Strong communication and collaboration skills, with the ability to work efficiently in cross-functional teams
Master's or PhD with relevant publications preferred but not required.