You'll own the synthesis challenges that matter most to Apple Silicon. You will apply your hands-on skills in developing, improving and supporting the implementation flow from RTL through GDS signoff. You will be directly responsible to improve physical synthesis techniques through innovative scripts, flows and automation.

As the synthesis and flow expert, you'll partner closely with design teams to define what works best for their specific challenges. You'll develop the methodologies, tools, and optimized flows that enable design teams to achieve breakthrough PPA results. You'll push beyond conventional synthesis limits - developing innovative techniques and proving their effectiveness by running full validation flows from RTL through place-and-route and timing signoff to show actual PPA improvements. Your optimizations will directly translate to faster, more efficient Apple devices.

You'll work directly with EDA vendors to shape tool roadmaps, build custom solutions for problems that push beyond industry standards, and see your work ship in millions of devices.

Minimum Qualifications
Experience with TCL, Python or Perl scripting languages

Experience with industry standard Synthesis tools such as Fusion Compiler or Genus

Experience working with CAD Tools & flow

Minimum requirement of BS + 20 years of relevant industry experience

Preferred Qualifications
Demonstrated experience in Implementation flows and methodologies (Synthesis, PNR, STA sign-off)

Hands on knowledge of industry standard Synthesis and PNR tools like Genus and Innovus

Ability to analyze RTL structures and identify optimization opportunities

Solid understanding of Extraction and STA methodology and tools

Experience with Power Analysis tools like PTPX is a plus

Proficiency with TCL, Python or Perl scripting languages strongly preferred