In this role, you will own the modeling and verification of advanced analog/RF blocks residing within a large SoC.
Minimum Qualifications
Minimum requirement of a bachelors degree.
Strong fundamentals in analog/RF circuit theory/topologies.
Experience with RNM coding in SystemVerilog.
Preferred Qualifications
MS and at least 3 years of industry experience is preferred
Experience working with Cadence mixed signal verification environment.
Ability to read analog schematics and extract related main functionality.
Experience modeling mixed signal/RF blocks including biasing networks, power regulators, bandgaps, Opamp's, OTA's, data converters, LNA, PA, mixers, couplers, splitters, combiners, etc…
Experience modeling high frequency PLL's is desired.