Floor-planning in collaboration with RF IC design and RF system team.
The layout of RF, analog, and digital blocks for RF ICs down to the transistor level.
Block-level and top-level layout through full verification flow.
Top-level layout integration, verification, and schedule management.
Work with packaging experts to simulate RF de-sense and coupling mechanisms.
Layout reviews for routing, signal path, IQ matching, and coupling.
Minimum Qualifications
Very good proficiency in the interpretation of CALIBRE DRC, LVS, ANTENNA-DRC, etc.
Knowledge of CADENCE layout tools
English language fluency is required for this position
Preferred Qualifications
The ideal candidate will have 5+ years of custom RF/analog layout experience with extensive knowledge of deep sub-micron CMOS and FinFET technologies
Bachelor's or Master's degree in Electrical Engineering or equivalent, and a minimum of 3 years relevant industry experience
Knowledge of layout techniques for device matching, parasitics reduction, RF shielding, and efficient high-frequency routing
Proven understanding of RF building blocks such as LNAs, mixers, VCOs, DCOs, PAs, etc.
Good understanding of RC delay, electro-migration, and coupling effects
High-level proficiency in the interpretation of CALIBRE DRC, LVS, ANTENNA-DRC, etc.
Excellent communication skills and ability to work in multi-functional teams
Experience in working with international teams
Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.