IC Packaging Engineer

We are looking for a senior level IC packaging engineer to develop exciting new products. Your role is to interface between internal product/device design, quality, supply chain, and the external suppliers to develop and deploy new packaging technologies. We are looking for individuals who are very innovative with a proven track record to bring packaging solution from concept to high-volume manufacturing.

Minimum Qualifications
M.S or Ph.D. degree in mechanical engineering, physics, materials science or similar disciplines with a minimum of 5 years of experience in IC packaging.
In-depth knowledge in wafer bumping, PM/RDL fan-in & fan-out & system-in-package integration, good understanding to module process such as Cu RDL, polymer passivation, advanced node wafer singulation and die level process.
Good understanding to Chip on Wafer hybrid or fusion bonding technologies is a plus.

Preferred Qualifications
Knowledge in wafer level CSP, fcCSP, SiP and their corresponding applications in power management, baseband and RF.
Good understanding to advanced silicon node BEOL and device physics or component/board level reliability testing.
Proven track record to drive issue resolution with good understanding to root cause and physics, motivate and mobilize all levels within supplier to accomplish any given task. Able to perform independent research and development work with minimal supervision.
Good written and verbal communication skills. Able to present ideas, design concepts, data and plan with high confidence at internal or external meetings.