Package Silicon Technology Node Development Director/DMTS

Micron Technology · MSB, Singapore

Workday Posted Jun 3, 2026 First seen Jun 3, 2026

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Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.


Director / DMTS – Package Development Engineering (PDE) 

Role Overview 
Micron Technology is seeking an accomplished technical leader to join our Package Development Engineering (PDE) organization as a Director / Distinguished Member of Technical Staff (DMTS). 
In this role, you will define and drive chip-package interaction (CPI) technology strategy and roadmaps to enable advanced silicon node transitions in next-generation memory products. You will operate at the intersection of silicon, package, and system-level integration, ensuring robust technology readiness and risk mitigation across increasingly complex design and process landscapes. 
This is a high-impact, cross-functional leadership role, requiring close collaboration with global engineering teams spanning Fab Process Integration, Product Development, Package Design, Assembly Technology Development, and Global Quality. You will play a critical role in shaping future memory product success through technology innovation, risk management, and execution excellence. 

Key Responsibilities

Technical Leadership & Strategy 
• Define, develop, and maintain long-term chip-package interaction (CPI) technology roadmaps aligned with advanced silicon node transitions 
•Drive technology strategy and risk management frameworks to support future memory product launches 
• Lead global technical initiatives to ensure alignment between silicon, package, and test vehicle readiness 

Cross-Functional Collaboration 
• Partner closely with teams in: Fab Process Integration , Product Design & Development, Package Design & Assembly Technology Development, Global Quality & Reliability Engineering 
• Establish and drive CPI risk identification, modeling, and mitigation strategies across development cycles 
• Ensure seamless integration of design, process, and packaging requirements across multiple business units and geographies 

Execution & Alignment 
• Align priorities, timelines, and resource planning with senior leadership and key stakeholders 
• Drive execution rigor across programs, ensuring technology readiness and delivery milestones are met
• Influence decision-making through data-driven insights and technical expertise 

Thought Leadership 
• Serve as a subject matter expert in CPI failure mechanisms and reliability risks 
• Mentor and guide engineering teams, fostering a culture of technical excellence and innovation 
• Represent PDE in strategic discussions with internal and external stakeholders 

Required Skills & Expertise 
• Deep understanding of semiconductor process technology development, including business processes and strategic planning 
• Strong knowledge of memory technologies and semiconductor device physics (preferred) 
• Demonstrated expertise in: Chip-package interaction (CPI) failure mechanisms, Reliability physics and risk assessment methodologies, Failure analysis, qualification, and screening techniques 
• Proven ability to lead complex, cross-disciplinary programs across global organizations 
• Strong collaboration and stakeholder management skills in a matrixed environment 
• Proven experience in technical leadership, mentoring, and driving organizational impact 
• Ability to manage multiple high-impact initiatives simultaneously 
• Excellent communication and presentation skills, with the ability to influence both technical and executive audiences 

Qualifications 
• Master’s or PhD in Materials Science, Electrical Engineering, Chemical Engineering, Physics, Chemistry, or a related technical discipline 
• 15+ years of experience in semiconductor technology development, packaging, or related fields 
• Extensive experience in: Chip-package interaction and integration challenges, Electrical and physical failure mechanisms, Reliability testing, qualification, and screening methodologies

• Strong track record of technical innovation and impact, evidenced by: Publications, Patent, Industry contributions 

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_sg@micron.com

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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