Analog Architect and Design Engineer Responsibilities: • Clock generation and distribution (VCOs, PLL, clock distribution, etc) • Design of custom passive components, from concept to silicon implementation • Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc) • High-speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.). • New techniques for the development of next generation optical transceiver • Silicon bring-up, debug and support • Supervise analog layouts within advanced process nodes • System verification and circuit design spec creation • Team communication and documentation Required Skills & Experience: • Master’s degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience. • Experience in advance cmos design and verification flows (tools to evaluate self-heating, electromigration, safe operating area) • Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must • Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus • Good understanding of analog layouts in FinFET and its effect on high-speed designs is a plus • Knowledge of the fundamentals on electromagnetism, lump models, and high-frequency design • Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks. • Strong communication and documentation skills